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1/13 september 2000 m27c516 512 kbit (32kb x16) otp eprom n 5v 10% supply voltage in read operation n access time: 35ns n low power consumption: C active current 30ma at 5mhz C stand-by current 100a n programming voltage: 12.75v 0.25v n programming time: 100s/word n electronic signature C manufacturer code: 20h C device code: 0fh description the m27c516 is a 512 kbit eprom offered in the otp range (one time programmable). it is ideally suited for microprocessor systems requiring large data or program storage and is organized as 32,768 words of 16 bits. the m27c516 is offered in a plcc44 and tsop40 (10 x 14 mm) packages. figure 1. logic diagram ai00932 15 a0-a14 p q0-q15 v pp v cc m27c516 g e v ss 16 plcc44 (c) tsop40 (n) 10 x 14 mm obsolete product(s) - obsolete product(s)
m27c516 2/13 figure 2b. tsop connections dq6 dq3 dq2 dq13 dq8 dq7 dq10 dq9 a14 a8 a11 a10 a4 nc a9 g a7 a2 dq1 dq0 a0 a1 a3 nc p e dq14 v pp v cc dq15 ai01600 m27c516 (normal) 10 1 11 20 21 30 31 40 v ss a12 a6 a13 a5 dq12 dq4 dq11 dq5 v ss figure 2a. lcc connections ai00934 a14 a11 a7 a3 23 q6 q5 q4 q3 q2 nc a2 q12 q8 v ss nc q11 q10 12 nc a9 1 q15 v ss a12 q13 a5 44 nc nc m27c516 q14 a13 a4 nc a6 34 q1 q9 a10 a8 q7 q0 g a0 a1 v pp e p v cc table 1. signal names a0-a14 address inputs q0-q15 data outputs e chip enable g output enable p program enable v cc supply voltage v pp program supply v ss ground nc not connected internally device operation the operating modes of the m27c516 are listed in the operating modes table. a single power supply is required in the read mode. all inputs are ttl levels except for g and 12v on a9 for electronic signature. read mode the m27c516 has two control functions, both of which must be logically active in order to obtain data at the outputs. chip enable (e ) is the power control and should be used for device selection. output enable (g ) is the output control and should be used to gate data to the output pins, indepen- dent of device selection. assuming that the ad- dresses are stable, the address access time (t avqv ) is equal to the delay from e to output (t elqv ). data is available at the output after a delay of t glqv from the falling edge of g , assuming that e has been low and the addresses have been sta- ble for at least t avqv -t glqv . obsolete product(s) - obsolete product(s)
3/13 m27c516 table 2. absolute maximum ratings (1) note: 1. except for the rating "operating temperature range", stresses above those listed in the table "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other condition s above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating condi - tions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant qual- ity documents. 2. minimum dc voltage on input or output is C0.5v with possible undershoot to C2.0v for a period less than 20ns. maximum dc voltage on output is v cc +0.5v with possible overshoot to v cc +2v for a period less than 20ns. 3. depends on range. table 3. operating modes note: x = v ih or v il , v id = 12v 0.5v. table 4. electronic signature note: outputs q15-q8 are set to '0'. symbol parameter value unit t a ambient operating temperature (3) C40 to 125 c t bias temperature under bias C50 to 125 c t stg storage temperature C65 to 150 c v io (2) input or output voltage (except a9) C2 to 7 v v cc supply voltage C2 to 7 v v a9 (2) a9 voltage C2 to 13.5 v v pp program supply voltage C2 to 14 v mode e g p a9 v pp q15-q0 read v il v il v ih x v cc data output output disable v il v ih xx v cc hi-z program v il x v il pulse x v pp data input verify v il v il v ih x v pp data output program inhibit v ih xxx v pp hi-z standby v ih xxx v cc hi-z electronic signature v il v il v ih v id v cc codes identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturers code v il 00100000 20h device code v ih 00001111 0fh obsolete product(s) - obsolete product(s)
m27c516 4/13 table 5. ac measurement conditions high speed standard input rise and fall times 10ns 20ns input pulse voltages 0 to 3v 0.4v to 2.4v input and output timing ref. voltages 1.5v 0.8v and 2v figure 3. ac testing input output waveform figure 4. ac testing load circuit ai02024b 1.3v out c l = 30pf or 60pf or 100pf c l includes jig capacitance 3.3k w 1n914 device under test table 6. capacitance (1) (t a = 25 c, f = 1 mhz) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously with or after v pp . 2. this parameter is sampled only and not tested 100%. symbol parameter test condition min max unit c in input capacitance v in = 0v 6pf c out output capacitance v out = 0v 12 pf standby mode the m27c516 has a standby mode which reduces the supply current from 30ma to 100a. the m27c516 is placed in the standby mode by apply- ing a cmos high signal to the e input. when in the standby mode, the outputs are in a high imped- ance state, independent of the g input. two line output control because otp eproms are usually used in larger memory arrays, the product features a 2 line con- trol function which accommodates the use of mul- tiple memory connection. the two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. for the most efficient use of these two control lines, e should be decoded and used as the prima- ry device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselect- ed memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. obsolete product(s) - obsolete product(s)
5/13 m27c516 table 7. read mode dc characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. maximum dc voltage on output is v cc +0.5v. table 8a. read mode ac characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. 3. speed obtained with high speed measurement conditions and a load capacitance of 30pf 4. speed obtained with a load capacitance of 60pf. symbol parameter test condition min max unit i li input leakage current 0v v in v cc 1 a i lo output leakage current 0v v out v cc 5 a i cc supply current e = v il , g = v il , f = 5mhz 30 ma i cc1 supply current (standby) ttl e = v ih 1ma i cc2 supply current (standby) cmos e > v cc C 0.3v 100 a i pp program current v pp = v cc 10 a v il input low voltage C0.3 0.8 v v ih (2) input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = C400a 2.4 v output high voltage cmos i oh = C100a v cc C 0.7v v symbol alt parameter test condition m27c516 unit -35 (3) -45 (3) -55 (4) min max min max min max t avqv t acc address valid to output valid e = v il , g = v il 35 45 55 ns t elqv t ce chip enable low to output valid g = v il 35 45 55 ns t glqv t oe output enable low to output valid e = v il 18 23 25 ns t ehqz (2) t df chip enable high to output hi-z g = v il 018018020ns t ghqz (2) t df output enable high to output hi-z e = v il 018018020ns t axqx t oh address transition to output transition e = v il , g = v il 000ns obsolete product(s) - obsolete product(s)
m27c516 6/13 table 8b. read mode ac characteristics (1) (t a = 0 to 70 c or C40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc ) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. 3. speed obtained with a load capacitance of 60pf symbol alt parameter test condition m27c516 unit -70 (3) -85/-10 min max min max t av qv t acc address valid to output valid e = v il , g = v il 70 85 ns t elqv t ce chip enable low to output valid g = v il 70 85 ns t glqv t oe output enable low to output valid e = v il 35 35 ns t ehqz (2) t df chip enable high to output hi-z g = v il 020030ns t ghqz (2) t df output enable high to output hi-z e = v il 020030ns t axqx t oh address transition to output transition e = v il , g = v il 00ns figure 5. read mode ac waveforms ai00935b taxqx tehqz a0-a14 e g q0-q15 tavqv tghqz tglqv telqv valid hi-z valid system considerations the power switching characteristics of advanced cmos eproms require careful decoupling of the devices. the supply current, i cc , has three seg- ments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of e . the magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. the associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. it is recommended that a 1f ceramic capacitor be used on every device between v cc and v ss . this should be a high frequency capaci- tor of low inherent inductance and should be placed as close to the device as possible. in addi- tion, a 4.7f bulk electrolytic capacitor should be used between v cc and v ss for every eight devic- es. the bulk capacitor should be located near the power supply connection point.the purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of pcb traces. obsolete product(s) - obsolete product(s)
7/13 m27c516 table 9. programming mode dc characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . table 10. programming mode ac characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. symbol parameter test condition min max unit i li input leakage current v il v in v ih 10 a i cc supply current 50 ma i pp program current e = v il 50 ma v il input low voltage C0.3 0.8 v v ih input high voltage 2 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = C400a 2.4 v v id a9 voltage 11.5 12.5 v symbol alt parameter test condition min max unit t avpl t as address valid to program low 2 s t qvpl t ds input valid to program low 2 s t vphpl t vps v pp high to program low 2s t vchpl t vcs v cc high to program low 2s t elpl t ces chip enable low to program low 2 s t plph t pw program pulse width 95 105 s t phqx t dh program high to input transition 2 s t qxgl t oes input transition to output enable low 2 s t glqv t oe output enable low to output valid 100 ns t ghqz (2) t dfp output enable high to output hi-z 0 130 ns t ghax t ah output enable high to address transition 0s programming when delivered (and after each '1's erasure for uv eprom), all bits of the m27c516 are in the '1' state. data is introduced by selectively program- ming '0's into the desired bit locations. although only '0's will be programmed, both '1's and '0's can be present in the data word. the only way to change a '0' to a '1' is by die exposure to ultraviolet light (uv eprom). the m27c516 is in the pro- gramming mode when v pp input is at 12.75v, e is at v il and p is pulsed to v il . the data to be pro- grammed is applied to 16 bits in parallel to the data output pins. the levels required for the address and data inputs are ttl. v cc is specified to be 6.25v 0.25v. obsolete product(s) - obsolete product(s)
m27c516 8/13 figure 6. programming and verify modes ac waveforms tavpl valid ai00936 a0-a14 q0-q15 v pp v cc p g data in data out e tqvpl tvphpl tvchpl tphqx tplph tglqv tqxgl telpl tghqz tghax program verify figure 7. programming flowchart ai00707c n = 0 last addr verify p = 100 m s pulse ++n = 25 ++ addr v cc = 6.25v, v pp = 12.75v fail check all words 1st: v cc = 6v 2nd: v cc = 4.2v yes no yes no yes no presto ii programming algorithm presto ii programming algorithm allows to pro- gram the whole array with a guaranteed margin, in a typical time of 3 seconds. programming with presto ii involves the application of a sequence of 100s program pulses to each byte until a cor- rect verify occurs (see figure 7). during program- ming and verify operation, a margin mode circuit is automatically activated in order to guar- antee that each cell is programmed with enough margin. no overprogram pulse is applied since the verify in margin mode provides necessary mar- gin to each programmed cell. program inhibit programming of multiple m27c516s in parallel with different data is also easily accomplished. ex- cept for e , all like inputs including g of the parallel m27c516 may be common. a ttl low level pulse applied to a m27c516's p input, with e low and v pp at 12.75v, will program that m27c516. a high level e input inhibits the other m27c516s from be- ing programmed. program verify a verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. the verify is accomplished with e and g at v il , p at v ih , v pp at 12.75v and v cc at 6.25v. obsolete product(s) - obsolete product(s)
9/13 m27c516 electronic signature the electronic signature (es) mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. the es mode is functional in the 25c 5c am- bient temperature range that is required when pro- gramming the m27c516. to activate the es mode, the programming equipment must force 11.5v to 12.5v on address line a9 of the m27c516. two identifier bytes may then be se- quenced from the device outputs by toggling ad- dress line a0 from v il to v ih . all other address lines must be held at v il during electronic signa- ture mode. byte 0 (a0 = v il ) represents the man- ufacturer code and byte 1 (a0 = v ih ) the device identifier code. for the stmicroelectronics m27c516, these two identifier bytes are given in table 4 and can be read-out on outputs q7 to q0. obsolete product(s) - obsolete product(s)
m27c516 10/13 table 11. ordering information scheme note: 1. high speed, see ac characteristics section for further information. 2. speed obtained with a load capacitance of 60pf. for a list of available options (speed, package, etc...) or for further information on any aspect of this de- vice, please contact the stmicroelectronics sales office nearest to you. example: m27c516 -70 x n 1 tr device type m27 supply voltage c = 5v device function 516 = 512 kbit (32kb x16) speed -35 (1) = 35 ns -45 (1) = 45 ns -55 (2) = 55 ns -70 (2) = 70 ns -85 = 85 ns -10 = 100 ns v cc tolerance blank = 10% x = 5% package c = plcc44 n = tsop40: 10 x 14 mm temperature range 1 = 0 to 70 c 6 = C40 to 85 c options tr = tape & reel packing table 12. revision history date revision details september 1998 first issue 09/25/00 an620 reference removed obsolete product(s) - obsolete product(s)
11/13 m27c516 table 13. plcc44 - 44 lead plastic leaded chip carrier, package mechanical data symbol millimeters inches typ min max typ min max a 4.20 4.70 0.165 0.185 a1 2.29 3.04 0.090 0.120 a2 C 0.51 C 0.020 b 0.33 0.53 0.013 0.021 b1 0.66 0.81 0.026 0.032 d 17.40 17.65 0.685 0.695 d1 16.51 16.66 0.650 0.656 d2 14.99 16.00 0.590 0.630 e 17.40 17.65 0.685 0.695 e1 16.51 16.66 0.650 0.656 e2 14.99 16.00 0.590 0.630 e 1.27 C C 0.050 C C f 0.00 0.25 0.000 0.010 r 0.89 C C 0.035 C C n44 44 cp 0.10 0.004 figure 8. plcc44 - 44 lead plastic leaded chip carrier, package outline drawing is not to scale. plcc d ne e1 e 1 n d1 nd cp b d2/e2 e b1 a1 a r 0.51 (.020) 1.14 (.045) f a2 obsolete product(s) - obsolete product(s)
m27c516 12/13 table 14. tsop40 - 40 lead plastic thin small outline, 10 x 14 mm, package mechanical data symbol millimeters inches typ min max typ min max a 1.20 0.047 a1 0.05 0.15 0.002 0.006 a2 0.95 1.05 0.037 0.041 b 0.17 0.27 0.007 0.011 c 0.10 0.21 0.004 0.008 d 13.80 14.20 0.543 0.559 d1 12.30 12.50 0.484 0.492 e 9.90 10.10 0.390 0.398 e 0.50 C C 0.020 C C l 0.50 0.70 0.020 0.028 a 0 5 0 5 n 40 40 cp 0.10 0.004 figure 9. tsop40 - 40 lead plastic thin small outline, 10 x 14 mm, package outline drawing is not to scale. tsop-a d1 e 1 n cp b e a2 a n/2 d die c l a1 a obsolete product(s) - obsolete product(s)
13/13 m27c516 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2000 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com obsolete product(s) - obsolete product(s)

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